Para-Pipe: Exploiting Hierarchical Operator Parallelism of ML Computational Graphs on SoCs
Paper recorded by Signals 4 on 2026-09-03 in cs.LG. Abstract reproduced from arXiv; link to the original below.
Published 2026-09-03 on arXiv · recorded by Signals 4 on 2026-09-04
Category: cs.LG · 机器学习 · first seen 2026-09-04
Abstract
As edge-based deep learning applications become more complex, optimizing performance on heterogeneous System-on-Chips (SoCs) presents unique challenges. Traditional pipelining techniques distributing the computation across different on-chip processing units, while effective for throughput, do not address the latency demands posed by modern neural networks with complex interdependencies and extensi
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Cite this page: Para-Pipe: Exploiting Hierarchical Operator Parallelism of ML Computational Graphs on SoCs: the #128 most recent of 215 cs.LG papers we have recorded (as of 2026-09-03). Source: Signals 4 (Signals API) — https://data.jiangzhang.ca/signals4/t/papers/para-pipe-exploiting-hierarchical-operator-parallelism-of-ml-computational-graph.html
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